Network on Chip(NoC) Pioneer Expands IP Offering to Enable Bus Interconnect on Small-Scale SoCs, Enhances Methodology for Implementing NoCs on Complex Chips
SAN JOSE, Calif. — (BUSINESS WIRE) — November 8, 2009 — Arteris Inc., the leading Network-on-Chip (NoC) interconnect IP solutions provider, today announced the availability of two new on-chip interconnect products, the FlexNoCTM and FlexWayTM packages. With these offerings, Arteris expands the capabilities of its market-leading NoC Solution to address the complete range of SoC design styles, sizes and complexities. The new technology builds on Arteris’ proven technology for designing and implementing NoCs, and delivers an expanded, scalable capability to combine traditional bus-based interconnect approaches with its NoC technology. The solution also offers an enhanced tool set, called the FlexArtistTM tool suite, which further automates the process of designing on-chip interconnect at each stage of the SoC design flow.
The new product line addresses a broad array of interconnect issues facing IC designers today, including the design of ICs with lower power, higher performance and lower silicon area. The current Arteris NoC Solution, which introduced a new approach to managing on-chip communication for designers challenged by the proliferation of IP cores used on a single chip and by increasingly stringent power, area and performance requirements, has been used extensively in complex designs by some of the world’s leading fabless and IDM chip companies. Arteris has built on that foundation to deliver a broader, more full-featured solution.
One of the key innovations of the new offering is the ability to use its solution for both NoC and bus-type interconnect. This enables semiconductor makers to use FlexNoC and FlexWay IP for a broad range of complexity and performance requirements, as well as at various stages in the design process. .
Two Packages to Address IC Complexity
The new Arteris product line adds two interconnect products:
- FlexNoCTM for implementing NoCs in medium to high-end SoC designs;
- FlexWayTM for addressing the needs of less complex SoC designs
The new Arteris IP products are supported by an enhanced design environment, the unified FlexArtistTM design tool set. The FlexArtist framework guides the design process starting from functional specification capture, through architectural refinement and ending with an automatic synthesis of a structural view used to drive the RTL to layout design flows. The FlexArtist system enables users to output RTL and SystemC models to provide an interconnect model for every stage of the SoC design flow. The FlexArtist tool includes automatic interconnect verification and test bench generation features.
“The Arteris FlexNoC and FlexWay offerings build on our industry-leading experience in developing on-chip interconnect solutions with our customers and partners for the past seven years. These new products expand the capabilities of NoC technology to implement an interconnect strategy that maps closely to the complexity of the ICs being designed. The interconnect solution scales with designers’ needs and is managed from a unified tool set that provides enhanced automation and ease of use throughout the SoC design flow,” said K. Charles Janac, President and CEO of Arteris. “With interconnect wires being a more and more significant percentage of IC die size, interconnect IP innovation is one of the key areas that can address the cost, complexity and performance challenges faced by IC designers.”
New Features for NoC and Bus Interconnect
Arteris enhanced NoC technology contains the following key new features and benefits:
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Low latency architecture: The Arteris FlexNoC product allows users the choice, per connection, to use a standard packet format or a zero latency packet format to carry protocol information. Such a choice allows the architect to do the best trade-off between resource utilization and latency for simple designs and latency sensitive blocks or IP. The use of the zero latency packet format allows users to eliminate any penalty involved in the packetization process. |
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Addressing the needs of simple SoC’s: The Arteris FlexWay product can be used as a bus replacement for simple SoC designs. It can also be used to address peripheral interconnect applications on more complex designs. This product is geared toward conservation of wires and silicon area while using the same FlexArtist design tool set as other Arteris IP products. |
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Scalability and a unified tool environment. Between the FlexNoC and FlexWay IP offerings, a semiconductor company can use Arteris technology for all of its SoC, FPGA and other projects. The new product line can be used from the most complex, large scale SoCs to relatively simple SoCs and FPGA designs. Structural Interconnect Synthesis . The FlexArtist tool set implements a new design flow and the capability to automatically synthesize a structural representation of an interconnect from an architectural description. The user still has the capabilities to manually control the synthesis process for fine performance tuning, and the FlexArtist tool offers unprecedented level of automation and productivity. Specification, architectural, structural and verification views are combined in a homogeneous framework. It supports AXI TM , AHB TM , APB TM and OCP 2.2 IP communication protocols, enabling high levels of IP reuse. |
