Ansys

“3D IC technology is triggering major changes in semiconductor design methods by blurring the distinction between chip design and system design,” said John Lee, vice president and general manager of the semiconductor, electronics, and optics business unit at Ansys. “With strong market positions in both semiconductor signoff and system level simulation, Ansys is well situated to collaborate with TSMC’s 3DFabric Alliance in delivering proven solutions and open design platforms for 3D IC design to our mutual customers.”

ARM

“Chiplets will be increasingly prevalent in the next generation of compute solutions, and Arm Neoverse platforms adopt 2.5D and 3D design to enable high core counts and heterogenous combinations with a diversity of accelerators, memory, and IO,” said Dermot O’Driscoll, vice president of product management, infrastructure line of business, Arm. “Arm is excited to join the TSMC 3DFabric Alliance to enable our mutual customers to innovate faster, with increased compute and cache resources optimized for yield and cost, allowing for silicon upgrades and reuse.”

ASE

“ASE is excited to be part of the TSMC 3DFabric Alliance, which will allow us to optimize our advanced packaging technologies together with other best-in-class partners within the 3D IC ecosystem,” said Mike Hung, senior vice president of central engineering, ASE Inc. “The exponential growth of the high-performance computing (HPC) market is accelerating the role of heterogeneous integration. ASE has already built a robust technology portfolio to help customers achieve superior computing performance and better power efficiency. Joining this new Alliance will augment our capability to offer customers complete turnkey services and bring their products to market faster.”

Cadence

“Over the years, Cadence has worked closely with TSMC on EDA and IP collaborations to enable customers to successfully leverage TSMC 3DFabric technologies,” said Dr. Chin-Chi Teng, senior vice president and general manager of the digital & signoff group at Cadence. “Our latest collaboration with TSMC includes EDA innovations on TSMC 3Dblox standard and the certification of the Integrity 3D IC platform, our unified 3D IC planning, implementation, and analysis solution. On IP, we’ve delivered the 40Gbps/channel Ultralink D2D PHY IP and the 112G-XSR PHY IP, illustrating a strong roadmap for the Universal Chiplet Interconnect Express (UCIe) standard for connecting chiplets. By joining the new OIP 3DFabric Alliance, we’re reinforcing our commitment to jointly advance design and analysis innovation across emerging multi-chiplet-based technologies for hyperscale computing, mobile, 5G, and AI applications.”

GUC

“We are looking forward to participating in TSMC 3DFabric Alliance at a time when advanced packaging technologies have begun a design revolution for HPC, AI, and network processors. Adopting TSMC’s 3DFabric technologies such as TSMC-SoIC allows much more efficient connectivity for these designs,” said Dr. Sean Tai, president of GUC. “As a long-standing TSMC OIP partner, GUC has successfully developed a platform to shorten design cycles and allow for low risk, high yield production of ASICs adopting TSMC 2.5D and 3D technologies.”

IBIDEN

“The development of information and communication technology requires further integration and performance improvement of semiconductors,” said Mr. Koji Kawashima, director & senior executive officer at IBIDEN. “IBIDEN welcomes TSMC’s initiative to launch the 3DFabric Alliance to further develop 3D packaging technology and will contribute to product realization in cooperation with joint partners.”

Micron

“Micron has been working closely with TSMC in previous and current High Bandwidth Memory (HBM) generations for CoWoS process compatibility and HBM interaction,” said Akshay Singh, vice president of advanced packaging technology development at Micron. “Micron is excited to join TSMC’s OIP 3DFabric Alliance and will help expand the scope with deeper collaboration in the delivery of solutions for future HBM generations to support customers’ success in system product innovations.”

Samsung Memory

“Samsung Memory has been in close collaboration with TSMC in previous and current HBM generations for CoWoS process compatibility and HBM interaction,” said Kyungsoo Ha, vice president of memory product planning group, Samsung Electronics. “Samsung Memory joining TSMC’s OIP 3DFabric Alliance will further expand the scope of work and delivery of solutions for future HBM generations to help customers unleash system-level innovations.”

Siemens

“Siemens EDA has worked closely with TSMC for years to qualify more of our industry-leading tools and flows, as demand for sophisticated 3D IC design solutions has grown over time,” said Joe Sawicki, executive vice president of IC-EDA for Siemens Digital Industries Software. “Today, that work has been formalized by Siemens extending its partnership with TSMC to now include participation in the foundry's new OIP 3DFabric Alliance. We look forward to continuing to deliver highly innovative new products and flows for our mutual customers to use in their design of 3D IC technology solutions.”

Silicon Creations

“We recognize the importance of 3D stacking and advanced packaging technologies in enabling continued performance increases and cost management for leading integrated circuit products,” said Randy Caplan, principal/co-founder of Silicon Creations. “As a leading supplier of clocking and interconnect solutions for TSMC’s leading process technologies, Silicon Creations is proud to join other top silicon IP providers as founding members of TSMC’s 3DFabric Alliance to provide robust IP solutions for the adaptive clocks demanded by stacked die.”

Siliconware Precision Industries

“As a leading provider of assembly and test, we are consistently collaborating with TSMC and are excited to join the new 3DFabric Alliance to enable system innovation and cutting-edge technology,” said Dr. Yu-Po Wang, vice president of corporate R & D, Siliconware Precision Industries Co., Ltd. “By utilizing top notch 3DFabric technologies, the flexible silicon stacking and modularity enable the best value for the product and customer.”

SK hynix

“SK hynix has been working closely with TSMC in previous and current HBM generations for CoWoS process compatibility and HBM interaction,” said Dr. Kangwook Lee, senior vice president, head of PKG development at SK hynix. “By joining the new 3DFabric Alliance, SK hynix is engaging in even deeper collaboration with TSMC to deliver solutions for future HBM generations and enable system product innovations.”

Synopsys

“Through the new 3DFabric Alliance, Synopsys and TSMC are accelerating multi-die system design for cost-effective integration, optimized performance and energy efficiency,” said Sassine Ghazi, president and chief operating officer at Synopsys. “We bring unified EDA and system design solutions and an IP portfolio that is the broadest in the industry. And together with TSMC’s 3DFabric technologies, we’re enabling our mutual customers to efficiently handle all aspects of multi-die design and heterogeneous integration to support advanced packaging for complex, compute-intensive applications.”

Teradyne

“Teradyne is excited to be a founding member of TSMC’s 3DFabric Alliance,” said Regan Mills, vice president of SoC marketing at Teradyne. “Early collaboration with TSMC and other alliance members will ensure the development of new, comprehensive test methodologies, accelerating readiness of the ecosystem and enabling faster time to market all while meeting or exceeding stringent quality objectives.”

Unimicron

“With a goal of being the global leading substrate supplier, Unimicron is dedicated to quality-adhered production and customer-oriented service,” said Unimicron Chairman T.J. Tseng. “It's our great pleasure to join TSMC’s new 3DFabric Alliance. As a member of the Alliance, Unimicron has been given the opportunity to contribute to the innovation of packaging technologies, and to develop and optimize advanced solutions in parallel with other semiconductor and tech leaders. Together with TSMC, we will provide our mutual customers with high-quality solutions in a timely manner.”

About TSMC Open Innovation Platform (OIP)

TSMC launched the Open Innovation Platform in 2008 to reduce design barriers and promote the speedy implementation of innovation in the semiconductor design community by bringing together the creative thinking of customers and partners. TSMC’s Open Innovation Platform (OIP) brings together the creative thinking of customers and partners under the common goal of shortening design time, time-to-volume, time-to-market and ultimately, time-to-revenue. The TSMC OIP features the most comprehensive design ecosystem alliance programs covering industry-leading EDA, library, IPs, Cloud, and design service partners. TSMC has worked closely with these ecosystem partners ever since the Company was established and continues to expand its libraries and silicon IP portfolio to more than 55,000 IP titles and provides more than 43,000 technology files and over 2,900 process design kits, from 0.5-micron to 3-nanometer, to customers.