FDL 2016: Call for Papers. Submission Deadline, April 26, 2016
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FDL 2016: Call for Papers. Submission Deadline, April 26, 2016

Apr 11, 2016 -- FDL is an international forum to exchange experiences and promote new trends in the application of languages, their associated design methods and tools for the design of electronic systems. FDL stimulates scientific and controversial discussions within and in-between scientific topics as described below. The program structure includes research working sessions, embedded tutorials, panels, and technical discussions. The Forum includes tutorials and fringe meetings, such as user group or standardization meetings. "Wild and Crazy Ideas" are also welcome.

Authors are invited to submit manuscripts on topics including, but not limited to:

* Formalisms & Languages:

Requirements & Property specification (RSLs, PSLs, SVA, …), Extra-functional specification (timing, power, temperature, aging, …), Multi-domain parallel applications in dynamic real-time environments, Models of computation, Automata (xFSM, …), Networks (Process Networks, Petri Nets, Task Networks), Platform modelling and abstraction, Transaction level modelling, Run-time system and middleware abstraction, Model and component-based design (UML, SysML, MARTE, …), Advanced language extensions for SLDLs (SystemC(-AMS), Modelica, VHDL-AMS, SystemVerilog, Verilog-AMS,…)

* Tools & Techniques:

Formal property checking, Modeling, Simulation & Formal Checking of functional and extra-functional properties, Parallel simulation, Compiler support for multi-core/many-core architectures as well as GPUs and FPGAs, Accelerators in heterogeneous computing platforms, Code analysis and optimization for different metrics, High-level hardware and software synthesis, Testbench automation and Coverage monitoring, Design space exploration and virtual prototyping, Scheduling & real-time analysis

* Design Flows & Methodologies:

Horizontal and vertical virtual integration testing, Requirements engineering and traceability, Mixed critical embedded applications on multi-core multi-CPU SoCs, Power and performance, Safety and security, Heterogeneous (mixed-signal/multiphysical) component integration, Multi-objective optimization, Model-Driven Engineering, Modeling and design of Cyber-Physical Systems (CPS)

===== Important Deadlines =====

Abstract Deadline: Apr 26, 2016
Paper Deadline: May 3, 2016
Other Contributions: Jun 7, 2016
Author Notification: Jul 5, 2016
Final Version: Aug 2, 2016

===== Submissions =====

Authors should submit papers in double column, IEEE format as PDF through the submission system. Full Research Papers shall not exceed 6-8 pages. Other Contributions like work in progress, wild & crazy ideas, demo night abstracts, or user experiences shall not exceed 2-4 pages. Submitted papers should be anonymous, are required to describe original unpublished work, and must not be under consideration for publication elsewhere.

Please submit you papers through the following submission system:
HTTPS://WWW.EASYCHAIR.ORG/CONFERENCES/?CONF=FDL2016

===== Publications =====

The conference proceedings will be published in electronic form with an ISSN and ISBN number and made available on the ECSI website and submitted for inclusion in IEEE Xplore. In addition, an edited collection of extended versions of selected best papers will be published as a book by Springer. Accepted papers must be presented by one of the authors. Registration of the presenting author is required prior to the camera ready papers deadline.

===== Conference Organization =====

General Co-Chairs:
Rolf Drechsler
University of Bremen
DFKI, DE

Robert Wille
Johannes Kepler University Linz
AT/DFKI, DE

Program Chair:
Franco Fummi
University of Verona
IT

Contacts:
Email Contact
www.ecsi.org/fdl