- Enables Night-Time Pedestrian Detection in ADAS Applications -
TOKYO — (BUSINESS WIRE) — February 23, 2016 — Toshiba Corporation (TOKYO:6502) today announced that it will expand its TMPV760 series line-up of image recognition processors for automotive applications with the launch of “TMPV7602XBG”, which is suited to monocular cameras in the Advanced Driver Assistance Systems (ADAS) applications. Sample shipments of TMPV7602XBG will start in March 2016, with mass production scheduled for January 2018.
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Toshiba: "TMPV7602XBG", a new TMPV760 series line-up of image recognition processors suited to monocular cameras in ADAS applications. (Photo: Business Wire)
The TMPV7602XBG provides high-speed, low-power image recognition of images captured by an on-vehicle monocular camera. It recognizes information necessary for safe driving, such as nearby pedestrians, vehicles, traffic lanes, traffic signs, road markings, and traffic lights.
The European New Car Assessment Programme (Euro NCAP) has released an updated roadmap for safety ratings, and the section on test items requires adoption of the following items by 2018: “pedestrian detection and collision avoidance systems in daylight and obscure lighting conditions” and “pedal cyclist detection and collision avoidance systems”. Toshiba’s new image recognition processor targets ADAS applications that need to cope with these new requirements.
While inheriting the high night-time object recognition performance of the TMPV760 series, TMPV7602XBG achieves low-power consumption and package downsizing (17.0mm×17.0mm, 521 balls, and BGA0.65mm pitch) by optimizing the circuits providing a single video input channel for monocular cameras. The TMPV7602XBG helps to inhibit heat generation in the on-vehicle camera and also contributes to a reduced package size.
ADAS, which includes autonomous braking and lane-keeping assistance, is now widely implemented in vehicles, from compact to luxury cars. Toshiba will continue to develop image recognition processors that deal with increasing deployment of systems for safe driving support.
Key Features of the New Product
1. Higher Recognition Accuracy, Especially at Night
The
TMPV7602XBG inherits the high night-time object recognition performance
of the TMPV760 series. Toshiba’s color-based feature descriptor, the
Enhanced CoHOG[1] accelerator, is integrated into the
TMPV7602XBG and supports four sets of feature descriptors[2],
such as the image feature descriptor CoHOG and color-based image feature
descriptor Color-CoHOG. This provides higher recognition accuracy
[3], especially at night and at times of low luminance difference
between objects and the background.
2. Downsizing the Camera Module by Miniaturizing a Package and
Reducing Power Consumption
Package size of the TMPV7602XBG has
been reduced (17.0mm×17.0mm, 521 balls, and BGA0.65mm pitch) by
optimizing the circuits to downsize the ADAS monocular camera module.
Its power consumption is expected to be 50% [4] lower than
that of the existing TMPV760 series product, TMPV7608XBG. In addition to
this, the newly-incorporated power management unit allows efficient
power management by controlling each functional block when it switches
to or from sleep mode.
[1] CoHOG is Toshiba’s original Co-occurrence Histograms of Oriented
Gradients technology.
[2] Color-CoHOG, Co-occurrence Histograms of
pairs of Edge orientations and color Differences (CoHED), Co-occurrence
Histograms of color Difference (CoHD), and Color Histogram.
[3] It
is equivalent to the day-time recognition rate of the TMPV75 Series.
[4]
Toshiba’s data of the image processing are being collected for product
development.
|
Outline of New Product |
||||||
| Part number |
Sample price
(tax included) |
Sample shipment | Mass production | |||
| TMPV7602XBG | 7,000 yen | March 2016 | January 2018 | |||
|
Main Specifications |
||||
| Part number | TMPV7602XBG | |||
| CPU |
Toshiba original 32-bit RISC CPU
Media embedded Processor(MeP) × 2 |
|||
| Image recognition engine |
Toshiba original 32-bit RISC
Media Processing Engine(MPE) × 4 |
|||
|
Image
|
Affine transform | 2 ch | ||
| Filter | 2 ch | |||
| Histogram | 2 ch | |||
|
Histogram of Oriented
|
2 ch
|
|||
| Enhanced CoHOG | 1 ch | |||
| Matching | 2 ch | |||
| Pyramid | 2 ch | |||
|
On-chip
|
Video input interface | 1 ch | ||
| Video output interface | 1 ch | |||
|
Power supply
|
Core: 1.1V, I/O: 3.3V and 1.2V (connect LPDDR2), 1.2V (MIPI Ⓡ CSI2-I/F) | |||
|
Operating
|
Max. 266.7MHz | |||
| Package | PLFBGA 521 balls, 17mm × 17mm, 0.65mm ball pitch | |||
