"TSMC's 16FinFET+ process is already delivering exceptional results with SoCs based on Cortex-A57 thanks to rapid progress in yield and performance," said Suk Lee, TSMC Senior Director, Design Infrastructure Marketing Division. "The combination of TSMC 16FF+ process technology and the implementation advantages of ARM POP IP gives our customers the opportunity to rapidly bring highly optimized mobile SoCs based on Cortex-A72 to market in early 2016."

"Cadence and ARM have a long history of close collaboration that has resulted in some noteworthy achievements enabling mutual customer success," said Dr. Chi-Ping Hsu, senior vice president and chief strategy officer for EDA, Cadence. "In support of the new ARM Premium mobile experience IP suite, Cadence has created a complete system-on-chip (SoC) environment to optimize its implementation, verify the system during OS boot-up and analyze interconnect subsystem performance. ARM used the Cadence digital and system-to-silicon verification tools and IP during the ARM Cortex-A72 processor development to ensure that the flow met complex mobile design requirements. This will help designers to shorten time to market while achieving optimal results at advanced process nodes."

"Through more than 20 years of collaboration with ARM, we've enabled our customers to use Synopsys tools to quickly get their innovative products to market while meeting power, performance and area design targets," said Deirdre Hanford, executive vice president, customer engagement, Synopsys. "Early adopters of ARM's new suite of IP, including the Cortex-A72 processor, CoreLink CCI-500 interconnect, Mali-T880 GPU, Mali-V550 video processor and Mali-DP550 display processor, are already using Synopsys tools, methodology and professional services to design and verify their products aimed at delivering a premium mobile experience. For the ARM Cortex-A72, a member of this new suite of IP, our Reference Implementation (RI) builds on our successful RIs for ARM Cortex-A57 and Cortex-A53 and will enable designers to take advantage of the 10X increase in design throughput that Synopsys' IC Compiler™ II product offers, while achieving the performance target in a mobile power envelope."


Contact:

Phil Hughes
+1 512-694-7382
Director of Tech PR
ARM
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