Alternatively, just the length of the register segment or the width of the ports in the IP can be documented, and the PDL can write and read binary values to and from specific bit ranges of the width. This style of PDL (commonly called bit-banging) is more difficult to write and debug, but does reduce even further the amount of information revealed by the IP supplier.
Improving Reuse, Reducing Cost, and Reducing Risk
These new structural and procedural descriptions define and limit what IP customers are expected to do with the IP, thus avoiding many problems of incorrect usage. 1149.1-2013 requires specific names of PDL procedures to be executed automatically during board test initialization. PDL procedures may be supplied to provide additional functional, verification, test, or debug capability. Such debug procedures can be used by the customer or by the IP supplier when necessary for support. The entire system is reasonably simple and straightforward, and eliminates multiple sources of error in the current design, verification, and test flow.
This new flow and methodology can remove much of the detail work involved in creating procedures requiring serial bit streams as previously used with the 1149.1 interface. It also enables integration of the IP into a chip without the integrator having to understand all the IP register segment details and without having to manually generate test procedures for the IP at the chip level. In fact, neither the chip integrator nor the downstream test engineers have to concern themselves with what the PDL is actually doing or how the test data registers or instrument ports are formatted.
Both standards also allow, for the first time, description and integration of the 1500 wrapper structure in an 1149.1 chip description. This allows PDL to access an IP with a 1500 wrapper at the same time it is accessing other IP.
All of this is intended to provide ease of use, maximize reuse, establish a documented verification and test methodology, and faster generation of tests while minimizing debug time.
Conclusions
It is clear that both of these standards will affect you and the entire industry in the next year or so if you are in the semiconductor industry doing IP or chip development. The results will be a significant advance in rigor and standardization of IP deliverables, significant improvements in the ability of an IP provider to control the use of their IP, and significant increases in the ease of use of IP. IP suppliers will be able to deliver IP with essentially turn-key integration with the rest of the chip, especially in the often mis-understood and even neglected areas of test.
1149.1-2013 has many other features that are new and not discussed in this article. Significant functionality with regards to power domains, segmenting the boundary scan register, chip initialization and more has been added.
While we have focused on IP test, today 1149.1 will be required for instrumentation that utilizes 1149.1-2013 or P1687.
Full Disclosure About SiliconAid Solutions Inc.
SiliconAid has contributing members in the following IEEE working groups: 1149.1-2013, P1687, and IEEE 1149.6. SiliconAid provides a full suite of chip focused products to support P1687, 1149.1, and 1149.6 standards. (IE. We are not a board test focused company. We are a JTAG based standards chip focused company.)
Want to find more information on SiliconAid Solutions 1149.1-2013 and P1687 tool suite? ( www.siliconaid.com/)
SiliconAid Solutions, Inc. is recognized as a leading provider of Design for Test consulting services encompassing methods, implementation, as well as team augmentation and training. The Senior DFT Consulting Group has been recognized for comprehensive support of all standard EDA DFT solutions.
SiliconAid also delivers world class chip-focused JTAG software solutions to validate, verify, and utilize IEEE 1149.X and P1687 related industry standards. The exhaustive chip-level validation, verification, and debug of IEEE JTAG-compliant implementations is based on over 20 years of testing and thousands of designs from multiple satisfied worldwide semiconductor companies. SiliconAid has corporate headquarters located in Austin, Texas and was founded in 2001
