HiSilicon Selects Cadence Tensilica Vision P6 DSP for its Latest Kirin 970 Mobile Application Processor

Cadence Joules RTL Power Solution Enables Socionext to Accelerate Low-Power HEVC 4K/60p Video Codec Chip Development

Connect, Share and Discuss the Latest Design and Verification Best Practices at the 2017 Cadence Jasper User Group Conference, Nov. 7-8

Call-for-Poster: 2017 Workshop on Hardware and Algorithms for Learning On-a-chip (HALO) Collocated with IEEE/ACM ICCAD, November 16, 2017, Irvine, CA, U.S.A.

Verific’s Parser Platform Selected as Efinix Integrated Design Environment Front End

NI AWR Design Environment Adds PDK Support for ON Semiconductor IPD Process

James Perry, Executive VP ASTERRA

Mike Klonsinski, President Berntsen

TRC’s Intelligent Grid Team Talks IT/OT Trends TRC

GISCafe Guest by Sanjay Gangal GISCafe Industry Predictions for 2025 – NV5

GISCafe Voice by Sanjay Gangal GISCafe Industry Predictions for 2025 – Leica Geosystems

Business Development Manager for Berntsen International, Inc. at Madison, Wisconsin

Consumer Electronics Show 2025 - CES 2025 at Las Vegas Convention Center Las Vegas NV - Jan 7 - 10, 2025

GeoBuiz Summit 2025 at Hyatt Regency Aurora-Denver Conference Center. Denver CO - Jan 13 - 15, 2025

Coastal GeoTools 2025 Conference at 301 North Water Street - Jan 27 - 30, 2025

Location, Enterprise Addressing & Public Safety (LEAP) Conference at United States - Jan 28 - 30, 2025