Magma Announces Talus Support of Common Power Format

With CPF Talus Becomes Only RTL-to-GDSII Flow to Support Both Major Power Formats

SAN JOSE, Calif., April 27, 2009 (GLOBE NEWSWIRE) -- Magma(r) Design Automation Inc. (Nasdaq:LAVA), a provider of chip design software, today announced that the Talus(r) IC implementation system has been enhanced to support the Common Power Format (CPF). With the addition of CPF, Talus becomes the first RTL-to-GDSII flow to support both the CPF and the Unified Power Format (UPF). Both formats enable better, faster, low-power integrated circuit (IC) implementation by allowing specifications to be captured just once and used consistently throughout the flow. By supporting both formats, Magma offers designers the flexibility to choose the low-power format that best suits their design while also providing advanced low-power design capabilities that minimize power consumption, maximize quality of results and reduce iterations.

Magma's open architecture and unified data model simplified the implementation of the CPF across the Talus RTL-to-GDSII environment. With its implementation and analysis engines sharing a single, common view of the design and CPF support, Talus enables designers to implement low-power design techniques throughout the flow.

"All applications, not just wireless and portable consumer devices, are driving the demand for lower power, lower cost ICs," said Premal Buch, general manager of Magma's Design Implementation Business Unit. "To help our customers meet these demands, Talus provides a flow that offers advanced low-power design techniques, including automated multi-voltage design, ultra-low-power clock tree synthesis and physical implementation, that meet dynamic and leakage power requirements while reducing turnaround time. By adding support for CPF we are being responsive to requests from our customers and enabling them to take advantage of the additional time savings through use of the low-power format of their choice."

Common Power Format: Capturing Designer's Intent for Power Management

CPF is a design specification language that addresses the limitation in traditional design automation tool flows by capturing the designer's intent for power management and enabling the automation of advanced power-lowering design techniques. The Common Power Format enables all design-, verification-, implementation- and technology-related power objectives to be captured in a single file and allows the application of that data across the design flow, in top-down, bottom-up and middle out methodologies, providing a consistent reference point for design development and production.

Talus: An Advanced Low-Power Design Flow

The Talus implementation system provides a fully integrated RTL-to-GDSII flow for high-performance, high-complexity, low-power nanometer designs. Talus Design, Hydra(tm) and Talus Vortex are key components of the system. Talus Design is a full-chip synthesis environment that enables rapid development of RTL and chip-level constraints throughout the design process, and automates data-path synthesis and floorplan generation for prototyping. Hydra is an advanced floorplan synthesis and hierarchical design planning product with physical optimization capabilities that delivers superior predictability. Talus Vortex is a physical design environment that delivers improved timing and signal integrity, smaller area, lower power, better manufacturability, faster turnaround time and higher capacity than conventional point-tool flows.

Talus Power Pro works in conjunction with Talus Design, Hydra and Talus Vortex to enable optimal power management throughout the flow. It features power-aware synthesis, physical optimization, clock tree synthesis and routing, allowing designers to minimize power and ensure uniform power distribution.

Talus Power Pro reads in the power constraints from the CPF file at the beginning of the RTL-to-GDSII flow. Power constraints such as clock gating, retention-flop synthesis and multi-Vdd domain definitions can be defined for dynamic power reduction. Special cells such as level shifters and isolation cells can be inferred during the synthesis stage to support multi-Vdd flows. For domains that are powered down, switches can be inferred at the RTL stage to facilitate simulation. State tables can be used to define the relationship between the different domains that have been created. Talus Power Pro can also write out CPF files at any point in the design flow for easy interoperability with third-party tools.

About Magma

Magma's software for designing integrated circuits (ICs) is used to create complex, high-performance chips required in cellular telephones, electronic games, WiFi, MP3 players, DVD/digital video, networking, automotive electronics and other electronic applications. Magma's EDA software for IC implementation, analysis, physical verification, circuit simulation and characterization is recognized as embodying the best in semiconductor technology, enabling the world's top chip companies to "Design Ahead of the Curve"(tm) while reducing design time and costs. Magma is headquartered in San Jose, Calif., with offices around the world. Magma's stock trades on Nasdaq under the ticker symbol LAVA. Visit Magma Design Automation on the Web at www.magma-da.com.

Magma and Talus are registered trademarks and "Design Ahead of the Curve" and Hydra is a trademark of Magma Design Automation Inc. All other product and company names are trademarks or registered trademarks of their respective companies.

Forward-looking Statements:

Except for the historical information contained herein, the matters set forth in this press release, including statements about Magma's software's ability to deliver designs with better performance, power and turnaround time; and statements about the features and benefits of Magma's software are forward-looking statements within the meaning of the "safe harbor" provisions of the Private Securities Litigation Reform Act of 1995. These forward-looking statements are subject to risks and uncertainties that could cause actual results to differ materially including but not limited to the ability of Magma's technologies to produce the desired results and the company's ability to keep pace with rapidly changing. Further discussion of these and other potential risk factors may be found in Magma's public filings with the Securities and Exchange Commission (www.sec.gov). The companies undertake no additional obligation to update these forward-looking statements.

CONTACT: Magma Design Automation Inc.
         Monica Marmie, Director, Marketing Communications
         (408) 565-7689
         
Email Contact

 

 

Featured Video
Jobs
GIS Specialist for Washington State Department of Natural Resources at Olympia, Washington
Business Development Manager for Berntsen International, Inc. at Madison, Wisconsin
Machine Learning Engineer 3D Geometry/ Multi-Modal for Autodesk at San Francisco, California
Equipment Engineer, Raxium for Google at Fremont, California
Mechanical Engineer 2 for Lam Research at Fremont, California
Mechanical Test Engineer, Platforms Infrastructure for Google at Mountain View, California
Upcoming Events
URISA GIS Leadership Academy at Embassy Suites Fort Worth Downtown 600 Commerce Street Fort Worth, TX - Nov 18 - 22, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation TechJobsCafe - Technical Jobs and Resumes  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise