UltraRISC Selects Valtrix STING for Verification of RISC-V SoC Designs

BANGALORE, India, June 1, 2023 — (PRNewswire) —   Valtrix Systems, an industry leading provider of RISC-V design verification products for building functionally correct CPU and system-on-chip implementations, announced today that UltraRISC, a leading provider of high-performance RISC-V IPs and multi-core processors headquartered in Shanghai, has licensed STING for the design verification of its RISC-V SoC implementations.

STING, a software-driven test stimulus generator from Valtrix, is capable of creating self-checking and architecturally correct portable programs that can be enabled on simulations, emulation, FPGA and silicon.

UltraRISC's Executive President and CTO, Dr. Jiang Jiang said, "Our company conducts rigorous verification to ensure that our processors are well designed and thoroughly verified. Valtrix's STING tool has made a significant contribution to our verification efforts on the UltraRISC's UR-A1 processor core, particularly the hypervisor extension for hardware virtualization. The capability of running tests across simulation and emulations makes it an ideal choice for our DV strategy."

"We are very excited to collaborate with UltraRISC as a lead partner for enabling STING for SoC verification of their advanced RISC-V implementations on hardware emulation platforms," said Shubhodeep Roy Choudhury, CEO of Valtrix. "Complementing the cycles run on simulation with testing on emulation, FPGA and post-silicon is critical in ensuring that the CPU and SoC designs are compliant and free of functional errors. STING's portable stimulus generation capability allows users to run the tests in any device-under-test environment, thus increasing verification reuse and efficiency," he added.

For more information on Valtrix's design verification technology and products, visit: https://www.valtrix.in

About Valtrix's STING Design Verification Tool

STING, the flagship product of Valtrix, is a commercially supported design verification tool for RISC-V based implementations. It can be configured to generate portable bare-metal programs containing self-checking architecturally-correct test stimulus, which can then be enabled on simulation, FPGA prototypes, emulation or silicon.

About UltraRISC

Headquartered in Shanghai, China, UltraRISC develops high-performance, power-efficient, and intelligent RISC-V IPs and multi-core processors and is dedicated to elevating the global RISC-V ecosystem. The company has three lines (UR-A, UR-AE and UR-E) of IP offerings in its processor core family, and one line of multi-core processors based on UR-A core in its SoC family. These offerings are designed to cover the major computing scenarios, including but not limited to edge computing, desktop, server, cloud, and self-driving use cases.

Cision View original content: https://www.prnewswire.co.uk/news-releases/ultrarisc-selects-valtrix-sting-for-verification-of-risc-v-soc-designs-301836845.html

Contact:
Company Name: Valtrix Systems
Shubhodeep Roy Choudhury, CEO, Valtrix
Email Contact Email Contact +91-9845735129

Featured Video
Latest Blog Posts
Sanjay GangalGISCafe Guest
by Sanjay Gangal
GISCafe Industry Predictions for 2025 – NV5
Jobs
Business Development Manager for Berntsen International, Inc. at Madison, Wisconsin
Upcoming Events
Consumer Electronics Show 2025 - CES 2025 at Las Vegas Convention Center Las Vegas NV - Jan 7 - 10, 2025
GeoBuiz Summit 2025 at Hyatt Regency Aurora-Denver Conference Center. Denver CO - Jan 13 - 15, 2025
Coastal GeoTools 2025 Conference at 301 North Water Street - Jan 27 - 30, 2025



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation TechJobsCafe - Technical Jobs and Resumes  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise