Combination of Synopsys' ARC IoT Communications IP Subsystem with Nestwave's Geolocation IP Eliminates the Need for a Dedicated Positioning Chipset

Highlights:

• Nestwave's low-power geolocation solution incorporates Synopsys DesignWare ARC IoT Communications IP Subsystem with integrated ARC EM9D Processor IP
• ARC EM9D processor and custom instruction extensions provide performance boosts for Nestwave's algorithms while minimizing processor frequency requirements
• Nestwave's split device / cloud architecture reduces power consumption by up to 10x compared to geolocation solutions currently on the market, extending the life of battery-operated IoT devices

Synopsys, Inc. (Nasdaq: SNPS) and Nestwave today announced a collaboration to combine Nestwave's soft core GPS navigation IP with the Synopsys DesignWare^® ARC^® IoT Communications IP Subsystem for a complete low-power global navigation satellite systems (GNSS) solution for integration into IoT modems. The collaboration will provide designers with a power-efficient, high-accuracy GPS solution for battery-operated devices without the additional cost of a dedicated GNSS chip. The joint solution will be presented at the Synopsys ARC Processor Virtual Summit on Wednesday, September 9, 2020.

"Today's advanced navigation systems are facing unique challenges when being implemented in power-constrained IoT devices," said Ambroise Popper, CEO at Nestwave. "By combining Nestwave's low power geolocation software with Synopsys' efficient ARC IoT Communications IP Subsystem, we can deliver a geolocation solution that offers greater accuracy, lower power consumption, and lower cost compared to existing GNSS solutions."

The ARC IoT Communications IP Subsystem is an integrated hardware and software solution that combines Synopsys' DSP-enhanced ARC EM9D processor, hardware accelerators, dedicated peripherals, and RF interface to deliver efficient DSP performance for ultra-low bandwidth IoT applications. Nestwave's GNSS solution takes advantage of the ARC EM9D processor's efficient DSP capabilities and ability to add dedicated hardware accelerators or custom instructions using APEX technology to reduce frequency requirements, giving customers additional performance bandwidth. The ARC EM9D processor is supported by the MetaWare Toolkit, which includes a rich library of DSP functions, allowing software engineers to rapidly implement algorithms from standard DSP building blocks.

Nestwave has developed an ultra-low power, advanced global navigation satellite systems (GNSS) solution for use in IoT applications. When integrated with an IoT modem such as NB-IoT, Cat M1, LoRa or Sigfox, the solution offers low-cost geolocation for emerging applications such as asset tracking, smart factories, and smart cities, without the need for an external GNSS chip.

"Emerging IoT applications are demanding geolocation functionality with high-accuracy and ultra-low power consumption," said John Koeter, senior vice president of marketing and strategy for IP at Synopsys. "The combination of Synopsys' ARC IoT Communications IP Subsystem with Nestwave's GNSS technology will help designers significantly improve geolocation performance, reduce frequency requirements and lower overall power consumption for battery-powered IoT applications."

Availability and Resources

• Synopsys' DesignWare ARC IoT Communications IP Subsystem is available now from Synopsys
• Learn about Nestwave's solutions
• Learn more about Synopsys and Nestwave collaborations at the ARC Processor Virtual Summit on September 9-10, 2020.

About Nestwave

Nestwave SAS, based in Paris, is a provider of advanced geolocation solutions to IoT and GNSS chipmakers. Our patented technology integrates into IoT modem and DSP devices enabling high performance, low power location capability and eliminates the need for a dedicated positioning chipset. To learn more, please visit us at  www.nestwave.com.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors, and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit https://www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Editorial Contact:
Kelly James
Synopsys, Inc.
650-584-8972
kellyj@synopsys.com

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SOURCE Synopsys, Inc.