SAN JOSE, Calif., June 06, 2019 (GLOBE NEWSWIRE) --

What
Chiplet design experience panel
A portion of the ODSA workshop will focus on chiplets in three areas: (1) building a proof-of-concept, multi-chiplet part that integrates die from multiple vendors; (2) defining an open interface between chiplets; and (3) developing new workflow and business models for product development with chiplets. The agenda will also highlight areas in which the ODSA projects are looking for assistance.

Who
Carlos Macian, senior director, AI Strategy and Products, eSilicon
Intel, AMD, Cisco and Xilinx will also be represented on this panel

When & Where
Monday, June 10, 2019
9:00 AM – 5:00 PM PDT
eSilicon panel 12:45 PM – 2:00 PM PDT

OCP ODSA Project Workshop
Intel Corporation HQ
3601 Juliette Lane
SC-9 Auditorium
Santa Clara, CA 95054-1513

About the OCP ODSA Project Workshop
The ODSA sub-project aims to reduce the cost and complexity of designing high-performance accelerators by enabling accelerators to be built from chiplets. The ODSA aims to define an open interface to enable easy interoperation across chiplets from multiple vendors. IC designers can then build products with best-of-breed chiplets for each function. Event information and registration can be found here.

About e Silicon
eSilicon provides complex FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions. Our ASIC-proven, differentiating IP includes highly configurable 7nm 56G/112G SerDes plus networking-optimized 16/14/7nm FinFET IP platforms featuring HBM2 PHY, TCAM, specialized memory compilers and I/O libraries. Our neuASIC™ platform provides AI-specific IP and a modular design methodology to create adaptable, highly efficient AI ASICs. eSilicon serves the high-bandwidth networking, high-performance computing, AI and 5G infrastructure markets. www.esilicon.com

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