IC Validator Physical Signoff and StarRC Extraction Signoff Displace Incumbent Tools

Highlights:

• IC Validator delivers superior productivity for DRC and LVS signoff of mixed signal designs
• StarRC's ultra-scalable extraction solution provides 10X runtime advantage with superior capacity
• Integrated flow with IC Validator LVS and StarRC delivers scalable solution for iC-Haus's special mixed signal needs

Synopsys, Inc. (Nasdaq: SNPS) and iC-Haus GmbH, a leader in application-specific ICs (ASICs) for industrial, automotive and medical technology, today announced that iC-Haus has adopted Synopsys' IC Validator and StarRC^™ products for design signoff. IC Validator's performance, effective root-cause analysis, and PIXEL language to code custom rules, enables fast DRC and LVS signoff for complex mixed signal designs. StarRC's ability to easily extract mixed signal designs with sizes exceeding 80mm² coupled with its highly-scalable extraction engine has allowed iC-Haus to achieve more than 10X faster extraction signoff using half the CPU resources. 

"iC-Haus develops complex application specific mixed signal custom designs," said Dr. Heiner Flocke, CEO at iC-Haus. "Synopsys' IC Validator and StarRC tools are able to quickly deliver functional verification and extraction solutions for our latest mixed signal designs. IC Validator and StarRC have integrated well into our proprietary custom design environment and exceeded our performance and debug requirements."

IC Validator, part of the Synopsys^® Design Platform, is a comprehensive and highly scalable physical verification tool suite including DRC, LVS, programmable electrical rule checks (ERC), dummy fill, and DFM enhancement. IC Validator is configured for today's extremely large designs by enabling eight CPUs with a single license. It uses both multi-threading and distributed processing over multiple machines to provide scalability benefits that extend to over 200 CPUs. IC Validator enables coding at higher levels of abstraction and is architected for near-linear scalability that maximizes utilization of mainstream hardware, using smart memory-aware load scheduling and balancing technologies.

StarRC, an integral part of the Synopsys Design Platform signoff solution, is the trusted market leader and industry gold standard for gate-level and transistor-level parasitic extraction. Providing extraction solutions for applications ranging from 100+ million instance digital system-on-chip (SoC) designs to custom memory, IP, standard cell and mixed signal designs, StarRC supports markets in mobile, data processing, communications, Internet of Things (IoT), automotive and more. It achieves superior performance and efficiency with ultra-scalable multi-core architecture, simultaneous multi-corner (SMC) extraction and fast engineering change order (ECO) capabilities while maintaining golden reference accuracy. Digital designers benefit from integration with Synopsys IC Compiler^™ II place and route system and PrimeTime^® static timing analysis tool to achieve faster ECO design closure while reducing disk space and compute resources. In custom design environments, designers benefit from high performance and capacity, as well as netlist reduction techniques for faster simulation and lower disk usage.

"Our customers are developing complex mixed signal circuits and require both high performance and easy-to-use design flows," said Christen Decoin, senior director of business development, Design Group at Synopsys. "Through superior scalability and tight integration between IC Validator and StarRC, Synopsys is providing mixed signal custom designers with the most efficient path to production silicon."

About iC-Haus

iC-Haus GmbH is a leading, independent German manufacturer of standard ICs (ASSP) and customized ASIC semiconductor solutions with worldwide representation. The company has been active in the design, production, and sales of application-specific ICs for industrial, automotive, and medical applications for more than 30 years. The iC-Haus cell libraries in CMOS, bipolar, and BCD technologies are specifically suited to realize the design of sensor, laser/opto, and actuator ASICs, amongst others. The ICs are assembled in standard plastic packages or using the iC-Haus chip-on-board technology to manufacture complete microsystems, multichip modules, and optoBGA/QFN in conjunction with sensors. Further information is available at www.ichaus.de.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15^th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Editorial Contacts:
James Watts
Synopsys, Inc.
650-584-1625
jwatts@synopsys.com

Peter Lange
iC-Haus GmbH
+49 6135 92920
peter.lange@ichaus.de 

View original content: http://www.prnewswire.com/news-releases/ic-haus-selects-synopsys-ic-validator-and-starrc-for-signoff-300570610.html

SOURCE Synopsys, Inc.