Renesas Electronics and ASTC Accelerate Software Development for Smart Cameras With Virtual Platform for R-Car V3M

PC-Based VLAB/IMP-TASimulator Contributes to a Significant Reduction in Development Time and Improvement in Software Quality

SANTA CLARA, Calif. — (BUSINESS WIRE) — October 24, 2017 — Renesas Electronics Corporation (TSE: 6723, Renesas), a premier supplier of advanced semiconductor solutions, Australian Semiconductor Technology Company Pty Ltd (ASTC), and VLAB Works, a subsidiary of ASTC, today announced a joint development of the VLAB/IMP-TASimulator virtual platform (VP) for Renesas’ R-Car V3M, an automotive system-on-chip (SoC) for advanced driving assistance systems (ADAS) and in-vehicle infotainment systems. The VP simulates image recognition and cognitive intellectual properties (IPs) in the R-Car V3M SoC and realizes embedded software development using a PC only, which enables the VP to shorten development time as well as improve software quality. The VLAB/IMP-TASimulator is one of the latest software development tools for the Renesas R-Car V3M and is part of Renesas autonomyTM concept, which was announced in April 2017.

This press release features multimedia. View the full release here: http://www.businesswire.com/news/home/20171024005695/en/

“Our goal is to provide a comprehensive, unified, and easy-to-use software development environment to all automotive system developers using R-Car SoCs,” said Jean-Francois Chouteau, Vice President, Global ADAS Center, Renesas Electronics Corporation. “The VLAB technology from ASTC is an important building block to speed up the development of ADAS software on the Renesas autonomy Platform.”

“We have a longstanding relationship with Renesas and are pleased to collaborate on their Renesas autonomy Platform to further accelerate software development for ADAS and automated driving,” said Hiroshi Yoshizawa, Australian Semiconductor Technology Company K.K. Vice President. “We have worked with Renesas on applying VLAB technology to model the R-Car V3M architecture, function, and timing, enabling R-Car V3M customers to bring new ADAS applications to market quickly with high quality and strong reliability.”

In ADAS and automated driving systems, algorithm development, including object detection and recognition to estimate the position of the vehicle, has become more complex and larger scaled, and algorithm development by PC has become the standard. However, it is difficult to port PC-developed algorithms to embedded software that deeply depends on hardware architecture. This makes it essential to have a development environment that enables a smooth transition or integration between the algorithm development phase and the embedded software development phase.

To address this need, Renesas and ASTC have jointly developed the VLAB/IMP-TASimulator VP, which enables embedded software development for the R-Car V3M using the PC only. ASTC's core technology, VLAB, simulates target hardware on the PC to enable system developers to develop embedded software only with a PC, eliminating the use of actual hardware. This enables system developers to check and control the hardware on a virtual environment displayed on the PC. In addition, the VP can efficiently detect defects in the developed software. By using the VLAB/IMP-TASimulator, system developers can develop high-quality software in less than half the development time.

Key features of the VLAB/IMP-TASimulator

  • Significant reduction in software development period by reproducing R-Car V3M’s IMP-X5 image recognition engine on PC
    The new VP reproduces the IMP-X5’s built-in 64 thread MIMD processor on the PC, which enables debugging such as step execution, break, and variable reference of software written in C language dedicated to multithreaded programming. This reduces the software development period dramatically compared to when not using this virtual environment.
  • ASTC's timing-correlated simulation technology enables an accurate estimation of the hardware processing time
    The new VP includes a timing-correlated simulator that accurately grasps and reflects the hardware key timing and efficiently simulates the IMP-X5 by modeling the complicated timing behaviour of the cache, bus, processor and other major components. This allows system developers to estimate the hardware processing time at least 100 times faster than the currently used cycle-based simulator.

Availability

The VLAB/IMP-TASimulator VP will be available from Q1 2018 from ASTC and VLAB Works. www.vlabworks.com.

For more information on Renesas, follow Renesas Electronics America at @RenesasAmerica on Twitter and https://www.facebook.com/RenesasAmericas/.

About ASTC and VLAB Works

ASTC (Australian Semiconductor Technology Company), along with its subsidiary VLAB Works, delivers a wide range of tools, IP, and design services, into the embedded semiconductor, software, and systems design markets. The company works across global markets and supply chains in the automotive, multimedia, transportation, medical, industrial, and aerospace industries. ASTC is privately held, and is headquartered in Adelaide, Australia, with offices in Australia, Europe, Japan, and North America. For more information, please visit: http://www.astc-design.com and  http://www.vlabworks.com.

About Renesas Electronics Corporation

Renesas Electronics Corporation (TSE: 6723) delivers trusted embedded design innovation with complete semiconductor solutions that enable billions of connected, intelligent devices to enhance the way people work and live—securely and safely. Renesas provides the expertise, quality, and comprehensive solutions for a broad range of Automotive, Industrial, Home Electronics (HE), Office Automation (OA) and Information Communication Technology (ICT) applications to help shape a limitless future. Learn more at https://www.renesas.com .

1 | 2  Next Page »
Featured Video
Jobs
GIS Specialist for Washington State Department of Natural Resources at Olympia, Washington
Business Development Manager for Berntsen International, Inc. at Madison, Wisconsin
Business Technology Analyst for Surface Water Management at Everett, Washington
Mechanical Test Engineer, Platforms Infrastructure for Google at Mountain View, California
Manufacturing Test Engineer for Google at Prague, Czechia, Czech Republic
Senior Principal Mechanical Engineer for General Dynamics Mission Systems at Canonsburg, Pennsylvania
Upcoming Events
Dimensions User Conference 2024 at The Venetian Resort Las Vegas NV - Nov 11 - 13, 2024
URISA GIS Leadership Academy at Embassy Suites Fort Worth Downtown 600 Commerce Street Fort Worth, TX - Nov 18 - 22, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation TechJobsCafe - Technical Jobs and Resumes  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise