Enables systems and semiconductor companies to deliver advanced-node designs to market faster

SAN JOSE, Calif., Feb. 16, 2016 — (PRNewswire) —  Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® Innovus™ Implementation System has been qualified for Samsung Foundry's latest 10-nanometer (10nm) process. The Innovus Implementation System is a next-generation physical implementation tool with integrated signoff engines that have been validated for Samsung designs, providing customers with the fastest path to implementation and closure and optimal power, performance and area (PPA).

The Innovus Implementation System offers customers key technologies for using the Samsung 10nm process including the GigaPlace™ solver-based placement technology, a slack-driven, pin access-aware placer that improves electrical and physical design convergence at advanced nodes. The tool also offers integration with the Cadence Quantus™ QRC Extraction Solution, the Tempus™ Timing Signoff Solution, the Voltus™ Power Integrity Solution and the Physical Verification System, all of which enable design convergence for faster design closure. The Innovus Implementation System incorporates a massively parallel architecture that increases capacity and drives better turnaround time without compromising PPA. For more information on the Innovus Implementation System, please visit www.cadence.com/innovus.

"We have collaborated with Samsung to enable customers to deploy production flows on 10nm FinFET designs in order to achieve the best PPA and overcome design complexity to meet aggressive time-to-market demands," said Dr. Anirudh Devgan, senior vice president and general manager of the Digital and Signoff Group at Cadence. "We are actively working with customers on new designs on the Samsung 10nm process using the Innovus Implementation System, and we are seeing early successes that can enable these designers to stay in front of the competition."

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at www.cadence.com.

© 2016 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the Cadence logo are registered trademarks and GigaPlace, Innovus, Quantus, Tempus and Voltus are trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

For more information, please contact:
Cadence Newsroom
408-944-7039
Email Contact

Logo - http://photos.prnewswire.com/prnh/20140102/SF39436LOGO

 

To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/cadence-innovus-implementation-system-qualified-on-samsung-10nm-finfet-process-300220282.html

SOURCE Cadence Design Systems, Inc.

Contact:

Cadence Design Systems, Inc. Web: http://www.cadence.com