Latest design techniques taught in three tracks on SystemVerilog, ESL and SystemC
LOUISVILLE, Colo. –– April 20, 2015 –– The Design Automation Conference ( DAC), the premier conference devoted to the design and automation of electronic systems, will feature a day of training to provide engineers with the latest techniques required for today’s designs. DAC 2015 will be held at the Moscone Center in San Francisco, Calif. from June 7-11, 2015 and conference registration is now open, including sign-up for “Thursday is Training Day.”
Organized into separate subject-specific tracks, each track comprises two separate half-day sessions: in the morning from 10:15am to 1:15pm, and in the afternoon from 2:15pm to 5:15pm. All tracks are taught by subject matter experts from the technical staff of Doulos, the global leader in the development and delivery of training solutions for electronic system design.
“DAC is a once-a-year opportunity for attendees to take advantage of learning about advances in design automation and also to be educated through DAC’s Training Day, Tutorials and Workshops,” said Anne Cirkel, 52nd DAC General Chair. “We are fortunate to have Doulos as a partner to deliver a full day of training for the engineering community.”
“After receiving great feedback from attendees at the past two years of “Thursday is Training Day,” we were delighted to be asked again to offer our services to deliver intensive skill set training in some key subject areas at this 52nd DAC conference,” said William Billowitch, VP/GM Doulos Inc. “We’re expecting high demand again for these sessions, which have really added a unique component to the engineering community’s experience within the DAC program.”
The three training tracks are:
- Track 1: System Verilog Verification
- Part 1: Hardcore System Verilog for Class-based Verification
- Part 2: Easier UVM
- Track 2: System Verilog
- Part 1: Synthesis Friendly System Verilog
- Part 2: Beyond the GUI: Using Tcl to Enhance your EDA Experience
- Track 3: ESL and SystemC
- Part 1: The SystemC Language
- Part 2: TLM-2.0 and the IEEE 1666-2011 Standard
Session details, including summaries, presenter information and room numbers, can be found at: https://dac.com/events/training. Reserve a seat when you register for DAC at www.dac.com.
About DAC
The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation (EDA) and silicon solutions. A diverse worldwide community representing more than 1,000 organizations attends each year, represented by everyone from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its exhibition and suite area with approximately 200 of the leading and emerging EDA, silicon, intellectual property (IP) and design services providers. The conference is sponsored by the Association for Computing Machinery (ACM), the Electronic Design Automation Consortium (EDA Consortium), and the Institute of Electrical and Electronics Engineers (IEEE), and is supported by ACM's Special Interest Group on Design.
