Zero ASIC Democratizing Chip Making
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Zero ASIC Democratizing Chip Making

CAMBRIDGE, Ma., Oct. 17, 2023 — (PRNewswire) — Zero ASIC, a semiconductor startup, today announced early access to its one-of-a-kind ChipMaker platform, demonstrating a number of world firsts:

Zero ASIC Democratizing Chip Making

"Custom Application Specific Integrated Circuits (ASICs) offer 10-100X cost and energy advantage over commercial off the shelf (COTS) devices, but the enormous development cost makes ASICs non-viable for most applications," said Andreas Olofsson, CEO and founder of Zero ASIC. "To build the next wave of world changing silicon devices, we need to reduce the barrier to ASICs by orders of magnitude. Our mission at Zero ASIC is to make ordering an ASIC as easy as ordering catalog parts from an electronics distributor."

ChipMaker Platform

Traditional chip design costs over $100M and takes expert teams 2-3 years to go from concept to production. Chiplet-based design offers a compelling solution to both the time and cost problem of custom ASICs by hiding all the complexities of circuit design inside a reusable validated chiplet. Zero ASIC has delivered on the chiplet vision by by creating a platform that enables automated design, validation, and assembly of System-in-Packages from a catalog of known good chiplets. The company's ChipMaker web based tools allows users to test out their custom designs quickly and accurately before ordering physical devices, using cloud FPGAs to implement the RTL source code of each chiplet in a custom SoC.

eFabric Active Interposer

Existing 2D/2.5D chiplet design approaches are fundamentally limited in shoreline bandwidth, wiring distances, and flexibility. To address these problems, Zero ASIC has developed eFabric, an active grid-like 3D interposer that improves die-to-die communication efficiency and composability. The eFabric supports integration of ultra-critical processing blocks using 3D attached eBrick chiplets and integration of off-package IO functions using 2D attached UCIe based ioBrick chiplets. The eFabric architecture enables unprecedented chiplet-based performance levels and flexibility:

eBrick 3D Chiplets

To enable plug-and-play chiplet composability, Zero ASIC has created a complete set of electrical and mechanical 3D chiplet standards specifications. The effectiveness of these standards have been demonstrated through the design of a number of interoperable 2 mm x 2 mm chiplets called eBricks:

Target Markets and Availability

Zero ASIC's composable chiplet ASICs are ideally suited for a diverse set of energy and supply chain challenged applications including robotics, automotive safety, aerospace and defense, 5G/6G communication, test and measurement, software defined radio, smart manufacturing, medical diagnostics, and high performance computing.

The ChipMaker design and emulation platform can be accessed immediately at zeroasic.com. Zero ASIC will be showing live demonstrations of the ChipMaker platform at the Open Compute Platform Summit (Open Chiplet Economy Center) October 17-19, in San Jose, CA.

Customized ASICs sampling in Q3 2024.

About Zero ASIC

Zero ASIC is a semiconductor company building an automated chiplet-based design and manufacturing platform offering orders of magnitude reduction in the time, cost, and risk of developing unique customer-driven ASICs for high performance systems. Zero ASIC is headquartered in Cambridge, Massachusetts. More information can be found at zeroasic.com.

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SOURCE Zero ASIC Corporation

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Company Name: Zero ASIC Corporation